spinalhdl

We have hosted the application spinalhdl in order to run this application in our online workstations with Wine or directly.

Quick description about spinalhdl:

SpinalHDL is a hardware description language (HDL) embedded in Scala. It allows designers to describe digital hardware (FPGA, ASIC) using higher-level constructs (object-oriented, functional) while generating low-level hardware description outputs (VHDL, Verilog). It seeks to be more powerful and expressive than VHDL/Verilog, reducing verbosity, without introducing performance or area overheads relative to hand-written VHDL/Verilog, and generating exactly what is asked.

Features:

• Embedded in Scala, enabling object-oriented and functional programming paradigms in hardware specification
• Generates VHDL and Verilog outputs for compatibility with standard EDA workflows
• Produces exactly what hardware designer requests � no extra hidden overhead or �magic� constructs
• Less verbose than traditional HDLs like VHDL or Verilog; more expressive syntax
• Free/open source; usable in industrial contexts under appropriate licensing (core under LGPL, libs under MIT)
• Strong documentation, examples, multiple build options (SBT, Gradle, Mill)

Programming Language: Scala.
Categories: